[step:Fix the register-machine model and define strong equivalence]
A [register machine](/pages/???) is a triple $M = (\Sigma, Q, P)$ where $\Sigma$ is a finite set of registers, $Q$ is a finite set of states, and the *program* $P$ is a function
\begin{align*}
P : Q &\to \mathsf{Commands}(\Sigma, Q)
\end{align*}
assigning to each state $q \in Q$ a *command* $P(q)$ drawn from the command set parameterised by $\Sigma$ and $Q$. A typical command has one of the shapes
\begin{align*}
\mathsf{inc}(r, q') \quad &\text{(increment register $r \in \Sigma$, go to state $q' \in Q$)}, \\
\mathsf{dec}(r, q', q'') \quad &\text{(decrement $r$ if $r > 0$ and go to $q'$; else go to $q''$)}, \\
\mathsf{halt} \quad &\text{(halt)}.
\end{align*}
The exact command syntax is not important; what matters is that $P(q)$ determines, together with the current register valuation, the *successor state* and the *successor register valuation* — i.e., there is a transition function
\begin{align*}
\delta_M : Q \times \mathbb{N}^\Sigma &\to (Q \cup \{\mathsf{halted}\}) \times \mathbb{N}^\Sigma
\end{align*}
defined by $\delta_M(q, \rho) := \text{outcome of executing } P(q) \text{ from valuation } \rho$. A designated *start state* $q_S \in Q$ is fixed.
Given an input register valuation $\rho_0 \in \mathbb{N}^\Sigma$, the *computation sequence* of $M$ from $\rho_0$ is the (finite or infinite) sequence of configurations
\begin{align*}
(q_0, \rho_0), (q_1, \rho_1), (q_2, \rho_2), \dots \quad \text{with } q_0 = q_S \text{ and } (q_{i+1}, \rho_{i+1}) = \delta_M(q_i, \rho_i),
\end{align*}
terminating the first time the outcome is $\mathsf{halted}$, in which case the final configuration is $(\mathsf{halted}, \rho_{\text{final}})$. A *reached state* of $M$ on input $\rho_0$ is any $q \in Q$ appearing as some $q_i$ in this sequence.
Two register machines $M$ and $M'$ over the same register set $\Sigma$ are *strongly equivalent* iff for every input valuation $\rho_0 \in \mathbb{N}^\Sigma$, the computation sequences of $M$ and $M'$ on input $\rho_0$ are identical on their shared state names and, in particular, halt at the same step with the same register valuations. Equivalently, strong equivalence requires the machines to execute the *same number of steps*, pass through a matching sequence of register valuations, and reach an agreement on the halting state's register contents. We adopt this as the working definition.
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