[step:Build the simulation states $Q_q$ for $q \in Q_D$]
For each state $q \in Q_D$, introduce a dedicated simulation state $q^\sharp$ in the register machine, meant to represent "the DFA is currently in state $q$, and the remaining unread input is in register $1$." These states are pairwise distinct and disjoint from $Q_{\text{rev}}$.
*Transition from $q^\sharp$ for $q \in Q_D$.* We describe the instruction $P^\sharp(q^\sharp)$:
Read register $1$. Two cases based on the read instruction's branch:
- If register $1$ is empty ($\varepsilon$ branch), the simulation has consumed all of $w$ and the DFA's current state is $q$. Branch to the *accept* state $q_{\text{acc}}$ if $q \in F$, or to the *reject* state $q_{\text{rej}}$ if $q \notin F$. This branching is not a dynamic decision — $q \in F$ or not is fixed at construction time for each $q$, so each $q^\sharp$ is hard-wired to go to either $q_{\text{acc}}$ or $q_{\text{rej}}$ on the $\varepsilon$ branch.
- If register $1$ is non-empty and the read instruction returns letter $b \in \Sigma$, branch to state $\delta(q, b)^\sharp$. Again, $\delta(q, b)$ is fixed at construction time, so the branch target for each $(q, b)$ pair is hard-wired.
[claim:With start state $q_0^\sharp$ and simulation states $\{q^\sharp : q \in Q_D\}$, the sub-machine $M_{\text{sim}}$ just described simulates the DFA $D$ on the input stored in register $1$, consuming it letter-by-letter, so long as the input in register $1$ is $\text{rev}(w)$ for some $w \in \Sigma^*$]
Let $w = b_1 \cdots b_n \in \Sigma^*$ and suppose at the start of $M_{\text{sim}}$ (state $q_0^\sharp$) register $1$ contains $\text{rev}(w) = b_n b_{n-1} \cdots b_1$. By induction on $t \in \{0, 1, \ldots, n\}$, we show that after $t$ iterations of the simulation loop, the current state is $\hat{\delta}(q_0, b_1 \cdots b_t)^\sharp$ and register $1$ contains $b_n b_{n-1} \cdots b_{t+1}$.
Base $t = 0$: start state is $q_0^\sharp = \hat{\delta}(q_0, \varepsilon)^\sharp$, and register $1$ contains $b_n \cdots b_1$, matching.
Inductive step. Assume at iteration $t$ the current state is $\hat{\delta}(q_0, b_1 \cdots b_t)^\sharp$ and register $1$ contains $b_n \cdots b_{t+1}$. The instruction at $\hat{\delta}(q_0, b_1 \cdots b_t)^\sharp$ reads register $1$; the last letter of register $1$ is $b_{t+1}$ (the rightmost letter of $b_n \cdots b_{t+1}$), so the read returns $b_{t+1}$ and the register's new contents are $b_n \cdots b_{t+2}$. The branch target for letter $b_{t+1}$ at state $\hat{\delta}(q_0, b_1 \cdots b_t)^\sharp$ is $\delta(\hat{\delta}(q_0, b_1 \cdots b_t), b_{t+1})^\sharp = \hat{\delta}(q_0, b_1 \cdots b_{t+1})^\sharp$ by the recursive definition of $\hat{\delta}$. This matches the invariant at step $t + 1$.
At step $t = n$, the state is $\hat{\delta}(q_0, w)^\sharp$ and register $1$ is empty. The next read returns $\varepsilon$, and by the hard-wired branching at $\hat{\delta}(q_0, w)^\sharp$, the sub-machine enters $q_{\text{acc}}$ if $\hat{\delta}(q_0, w) \in F$ (equivalently $w \in L$) or $q_{\text{rej}}$ if $w \notin L$.
[/claim]
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